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121) The main functions of the procedure is to use Huffman coding lossless compression of data to achieve Huffman compression encoder and decoder.

122) The crucial path includes address buffer, decoder, memory unit, sense amplifier and output buffer.

123) The coder and decoder adopt G732.1 recommendation, which is a standard of low bit-rate voice codec, proposed by the International Telecommunications Union (ITU).

124) In a shift register mode of the data storage device (120), the address decoder (140) is responsive to an address generator (160) comprising a modulo-N counter.

125) After digital signal passing the satellite channel, decoder can"t synchronize with transmitted message. So synchronizing code groups are inserted in transmitted code groups."

126) Provided is a decoder and decoding method for performing decoding process to the encoded image data.

127) On the module level optimization, the reconfiguration optimization is used in the design of intra-prediction module of AVS video decoder.

128) However, the encoder and decoder hardware implementations are very difficult for the codes with block size.

129) Timing adjusting circuits have a ferroelectric capacitor for timing adjustment in transmitting the activation signals output from the column decoder to the sense amplifier circuits.

129) Sentencedict.com is a sentence dictionary, on which you can find nice sentences for a large number of words.

130) Caesar Encoder and Decoder source code integrity, and can be used directly.

131) An implementation method and the implementation result of HDTV video decoder bit stream distribution circuit are given out in this paper based on the HDTV video stream construction.

132) The working principle of SANYO colour decoder circuit IC LA1390C is described in detail. Every unit circuit in IC are analysed in this paper.

133) Furthermore, a unified channel decoder for mobile terminal is designed which can support several communication standards, uses least resource and save cost in this paper.

134) The main products are digital TV front-end equipment, including digital encoder and decoder, multiplexers, network adapters and so on.

135) The idea of TTCN-3 universal decoder supporting different types of protocol is proposed in this thesis, which is a research-oriented beneficial attempt for TTCN-3 protocol testing.

136) The decoder can be used for receiving digital data and outputting analog voltage.

137) Soft-Input Soft-Out (SISO) per-tone equalizer exchanges soft information with SISO channel decoder through iterative process.

138) The remote controller includes: bell flow detection circuit, pickup and hangup circuit, DTMF decoder circuit, SPCE061A, voice broadcast circuit and control circuit.

139) An efficient beam search decoder for phrase - based statistical machine translation was described.

140) Along with the development of digital television, people are paying more attention to the MPEG-2 audio and video coder, the MPEG-2 audio and video decoder.

141) PDF - H . 264 decoder CAVLC code table lookup algorithm improvements.

142) An FPGA implementation method of this scheme is presented, including BCH encoder and decoder and the interleaver.

143) Because the single-check code decoder(SISO) module is the core of operation unit in LDPC decoder, its implementation is described in detail.

144) Configuration of crossbar decoder, DMA controller and ADC controller are illustrated.

145) The product of the company includes frequency of silicon tuner, demodulator, MPEG and video decoder, and dial in the light of what mothball channel applies modem.

146) This paper presents a joint irregular low - density parity - check ( LDPC ) code - encoder - decoder design approach.

147) A column decoder outputs activation signals to activate the sense amplifier circuits.

148) A new method named as pulse edge strobing decoder is presented to solve the problems . The principle of this method which is based on dithering periodic sampling is analyzed and proved theoretically.

149) It has to obtain instructions from the memory and interpret them at the instruction decoder.

150) Moreover, according to this enhanced algorithm, the author designs hardware architecture of the decoder based on the pipelined technique and gives the timing diagram.